All Services Programming & Development ASIC, FPGA hardware design engineer $24/hr · Starting at $200 FPGA and ASIC front end design, Verilog and SystemVerilog IP cores design and verification. FPGA based embedded system design and full cycle implementation About $24/hr · Ongoing Download Resume FPGA and ASIC front end design, Verilog and SystemVerilog IP cores design and verification. FPGA based embedded system design and full cycle implementation Skills & Expertise DesignEngineeringFPGAFront End DesignFront End DevelopmentSystems EngineeringVerilog 0 Reviews This Freelancer has not received any feedback. Browse Similar Freelance Experts DesignersFront End DevelopersEngineersFPGA Developers