FPGA SOC Design Test and Verification (5047856)

Engineering & Architecture engineering (mechanical / chemical / civil / electrical)

FPGA SOC Design Test and Verification

$5/hr Starting at $20K

My FPGA / ASIC verification services can help you to:

Define your verification strategy
Develop a complete verification specification, test plan, and cover plan
Put in place a fully-scripted verification environment
Develop a high-level, self-checking, simulation test bench with functional coverage
Create a comprehensive test case suite to achieve full functional and code coverage
Reach coverage goal faster using constrained random verification
Set up and run gate-level simulations

I am experts in:

$5/hr Ongoing

My FPGA / ASIC verification services can help you to:

Define your verification strategy
Develop a complete verification specification, test plan, and cover plan
Put in place a fully-scripted verification environment
Develop a high-level, self-checking, simulation test bench with functional coverage
Create a comprehensive test case suite to achieve full functional and code coverage
Reach coverage goal faster using constrained random verification
Set up and run gate-level simulations

I am experts in:

DesignElectrical EngineeringEngineeringFPGAProduct DevelopmentProgrammingSimulation ModelingSoftware TestingTest Case DesignVerilogVHDL

Trang 5 says,

Great engineering design work as well as a well written application note. This contractor was good at communicating expectations as well as fulfilling task requirements. Will be hiring him for other jobs in the future.

for Create New Application Notes on Oct 14, 2016
Trang 5 says,

Ahmed provided a great technical paper in a timely manner. He was very responsive to emails and we were pleased with the application note that he provided us. We will definitely work with him more in the future.

for Create New Application Notes on Sep 21, 2016
DrBeauWebber says,

Writes really clear and easy to understand code. I find that I can easily pick up the code he has written to modify it for related tasks. Works quickly.

for VHDL state-machine, FTDI + Altera FPGA. on Sep 29, 2011