=> I will design complete FPGA system for you according to required specifications. I will provide complete code, simulation testbench and an instruction file to help you run the code. I have worked on both, Quartus as well as Vivado.
=> Currently, I have expertise on Verilog HDL. I will provide you a solution verified by simulation results on ModelSim.
=> I will write Verilog Code in any Abstraction Level (Gate, Behavioural & Structural) for
- Combinational Logic
- Sequential Logic
- Finite State Machine
=> I have sound hands on Verilog Synthesizable constructs.
=> I have 2 years experience in the field, and have done many Digital System Design projects. One of them is a complete RTL of RISC V standard 5 stage pipelined processor, running on Altera DE1 board.
=> I have also designed a custom instruction set based processor for a company. I am currently working on many classified projects in the field.
=> You can also count on me to do some design task on Logisim. I have also designed a working simulation of a complete pipelined processor in logisim.
Feel free to contact me before placing an order.If you have any question regarding this gig or anything else, you can contact me. I 'll reply to you ASAP.