Developed HercuLeS high-level synthesis technology. HercuLeS synthesizes software descriptions in either C or a simple n-tuple notation, called NAC (N-Address Code) to FSMD-style accelerators in VHDL; a self-checking testbench is also automatically generated. Features:* Support of multi-precision integer, and fixed-/floating-point arithmetic* Conversion into- and out-of- SSA using the Appel and Aycock-Horspool algorithms; pseudo SSA forms also supported* Supports inference of block RAM storage* Translation to CDFGs (Control-Data Flow Graphs) in Graphviz form. These files are the actual input to the high-level synthesis kernel* Sequential and ASAP scheduling with chaining optimization* Data flow analysis* Hardware operator library (including multipliers, dividers, variable shifters, rotators)* Script file generation (Makefiles, shell scripts) for third-party tool integration (GHDL, Mentor Modelsim, Xilinx XST/ISE)* ANSI C backendA demo suite of automatically generated applications and t