Python, Web scrapping, SystemVerilog

I have a MsC degree in Electrical Engineering & Computer Science. 

My specialization is on Digital Design and Electronics. I code in Verilog/System Verilog/VHDL and I'm very experienced using UVM (Universal Verification Methodology) for verifying RTL designs. 

I have also gained experience and accomplished projects in several areas, such as Digital Signal Processing, Electronic Circuits & Measurements, Microprocessors, Integrated Circuits, Artificial Intelligence, Algorithms, Sensors, Computer Architecture & Design, Computer Networks, etc. 

I enjoy using my creative expertise and knowledge to provide my friends and clients with the best solutions. I like challenging requests, and I enjoy trying hard to deliver the perfect project. My sense of tackling hard jobs makes me ready for any job in my area of expertise. Hope I could be of assistance! 

Apostolis