$35/hr
·
Starting at
$35
Ongoing
8 year's experience in digital system design using VHDL and verilog for FPGA's and CPLD's both for Xilinx and Altera Chips. I also have 8 years experience in working with Xilinx Ise form version 6.2 to...
QuartusRtlSystemVerilogVerilogVHDL