I had more than three years of industrial experience in the field of FPGAs and Systems Design.
--- Languages: Verilog/VHDL, systemVerilog, C/C++
--- Tools: Synopsys, ModelSim, Xilinx Vivado, ISE, EDK, SystemGenerator, PlanAhead, Quartus II, Eclipse C/C++
--- OS: Linux, Windows
--- Others: Physics (always love it)
Contact me if you need those services. Thank you for your spending time to view my profile.
Work Terms
I can work 15 hours a week and be on $10 per hour.