Over Twenty years experience in design research and development at board and FPGA level, with experience in embedded system and (PCB)board level design. Experienced in FPGA, CPLD design, Xilinx, Altera and Lattice, using VHDL with Synopsys, Leonardo, Renoir, Xilinx Vivado, MaxPlus II, Quartus, Aldec, Modelsim as well as ECL, TTL, CMOS logic design. Telecom experience with SONET/SDH at OC-3, T3, ADSL and ATM. Processor experience includes 680XX, 860, 8260, 360, Mindspeed VoIP( ARM core) Processor 82520, Broadcom (MIPS core) BCM1101, SH-3. I have also experienced many CAD and PCB design tools including Viewlogic, Mentor Graphics, Protel, Orcad. Experienced bus structures including cPCI, PCI, H.100, ST Bus, VME, UNIBUS, and other proprietary structures.