All Services Engineering & Architecture ASIC Design and Verification $100/hr · Starting at $500 VLSI, SoC Verification, ASIC Verification, UVM, System Verilog, Veriolg, C/C++, Perl, Python, Linux, Functional Coverages, System Verilog Assertions, ACE, AXI, AHB, APB, I2C, SPI, JTAG TAP, 8b/10b Enc Dec, RISC-V Processor Verification About $100/hr · Ongoing Download Resume VLSI, SoC Verification, ASIC Verification, UVM, System Verilog, Veriolg, C/C++, Perl, Python, Linux, Functional Coverages, System Verilog Assertions, ACE, AXI, AHB, APB, I2C, SPI, JTAG TAP, 8b/10b Enc Dec, RISC-V Processor Verification Skills & Expertise AceASICC++DesignDesign Verification TestingFunctional DesignI2CLinuxPerlPythonRiscSocSpiSystem VerilogUvmVerilogVLSI 0 Reviews This Freelancer has not received any feedback. Browse Similar Freelance Experts Python DevelopersPerl DevelopersC++ DevelopersDesigners