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Skills

  • Ace
  • ASIC
  • C++
  • Design
  • Design Verification Testing
  • Functional Design
  • I2C
  • Linux
  • Perl
  • Python
  • Risc
  • Soc
  • Spi
  • System Verilog
  • Uvm

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Services

  • ASIC Design and Verification

    $100/hr Starting at $500 Ongoing

    Dedicated Resource

    VLSI, SoC Verification, ASIC Verification, UVM, System Verilog, Veriolg, C/C++, Perl, Python, Linux, Functional Coverages, System Verilog Assertions, ACE, AXI, AHB, APB, I2C, SPI, JTAG TAP, 8b/10b Enc...

    AceASICC++DesignDesign Verification Testing

About

ASIC//SoC//IP//FPGA Design and Verification

Hello,

Please reach me for proposal....

Thanks and Regards
Raju Sane