$5/hr
·
Starting at
$25
Ongoing
9+ years of experience in the Hardware front-end domain, ASIC/FPGA/Emulation IP design and verification. Degrees: MSc, BSc, Electronis design systems. Keywords: Verilog, System Verilog, C++, System C...
ArchitectsDesignDesign Verification TestingDomain RegistrationEngineering